NASA Universal Asynchronous Receiver Transmitter (UART) Intellectual Property (IP) and VHDL Code

About this technology

Overview

The NASA_UART_Example is an Aldec Active-HDL project that contains the Intellectual Property (IP) files for a NASA developed Universal Asynchronous Receiver Transmitter (UART) and supporting files to implement an example of using the UART IP. The source files are a combination of Active-HDL block diagrams, Active-HDL state machines, and VHDL code. The block diagram and state machines compile down to VHDL code. All the source and compiled VHDL files are provided.